Wielding numerous analogies for his audience of MIT students, Anant Agarwal makes the case that the next generation of computers, not to mention much of the technology in everyday life, will be built with smaller, simpler parts “combined in a clever way.” Agarwal starts with Puerto Rico’s enormous Arecibo radio telescope, 400 meters in diameter, tuned to detect extraterrestrial life. Rather than being carved from a single gigantic material, the dish consists of “a whole bunch of tiles” adjusted to create a spherical surface. In the same way, CPU designers no longer make “one big honking processor,” says Agarwal, but lots of little processing elements called tiles or cores. This engineering movement, which MIT helped spark in the 1990s, has brought about multicore processors on chips, which overcome not just the number-crunching limitations of single processors, but their power drain as well. Agarwal uses the example of eating ice cream: You really enjoy the first few spoonfuls, but by the 30th or 40th taste, “you’re tapped out.” By illustrating the marginal value of eating one more spoonful, Agarwal tries to get at the idea that once you’ve got a big processor, “making it bigger doesn’t give you much return.” In fact, as he shows with some math and graphs, having two or more processors works much better, including burning less power. He applies Moore’s law and predicts that beyond the four or more cores on chips we now have (he’s already developed a 64-core chip), we’ll be seeing 1000 tiles per chip in the next five years or so — assuming we can overcome three big “P” challenges. There’s the performance hurdle of getting all those multicore chips to talk to each other and to the outside world without the gridlock found on a busy city street; power efficiency, which will require rethinking CPU architecture; and a very big programming obstacle, which may involve deploying an optical broadcast medium. Crack these, and “multicore could replace all hardware in...